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Engine knock signal processor HIP9011


The engine knock signal processor HIP9011 is used to provide a detection method for early detonation that is commonly referred to as a "cottage or flat" internal combustion engine. A simplified block diagram shown in the IC. The chip can be selected between one of the two sensors, if required for accurate monitoring or for a "V" type engine. Internal control through the SPI bus is fast enough to switch the sensor for each firing cycle. A programmable bandpass filter processes the input signal from either sensor. The bandpass filter can be selected to optimize extraction of engine knock or flat signal background noise from the engine. The full-wave rectification of the filtered signal is obtained by further individual processing and applied to the output voltage level of the integrator to proportionalize the amplitude of the knock signal. The chip is controlled by a microprocessor under the SPI bus interface.

 

Simplified block diagram:

 

hip9011

 

Instructions

 

The design of such an integrated circuit is a universal digitally controlled analog engine acoustic sensor or an interface between accelerometers and a fuel management system for the internal combustion engine. Set up two wideband input amplifiers which will allow the use of two sensors. These sensors are piezoelectric and can be mounted in any inline or V-optimal engine configuration. The outputs from these input amplifiers are directed to a channel selection multiplexer and then into a 3rd order anti-aliasing filter. The output signal is then directed to two programmable gain stages, one of which reverses or shifts the knock signal by 180 degrees. The gain stage signal is output to two programmable bandpass filter stages. From the two output BPF stages are digitized before the full-wave rectification is integrated by programmable integration. The integral output is applied to the line driver for further processing of the engine fuel management control system. The gain, pass filter and integrator stage settings are provided by a programmable microprocessor via the SPI bus interface for wideband piezoceramic transducer engine signal pickups with sequential device capacitance of 1100pF and output voltage ranging from 5mV to 8VRMS . In normal engine operation, a single input channel is selected and applied to the HIP9011. The engine background noise is usually much lower than the pre-knock noise at amplitude. Therefore, the bandpass filter stage can be optimized to further differentiate the engine's background, combustion noise and pre-explosion sound. A basic method of engine pre-explosion system is to observe the engine's background noise prediction only during time intervals, if detected, delay time. This basic method does not require sensitivity and this is a solution that requires a continuously adjustable selectivity. Improve fuel economy and performance when the IC is coupled with a microprocessor controlled fuel management system.

 

Pin:

 

HIP9011-SOIC

 

Two amplifiers can be selected to interface to the engine sensor. These amplifiers have a typical open-loop gain of 100 dB with a typical bandwidth of 2.6 MHz. A 0.5V power rail within the common mode input voltage range. The amplified fi er output also has a similar output range. Sufficient gain, bandwidth and output swing capability are set to ensure that the amplifier can handle attenuated gain of 20 set to 1 or -26dB. This would be a high peak output signal when needed, from which the 8VRMS is obtained from the transducer. The gain setting is 10 times and the transducer can also have an output level of 5mV RMS when needed. In a typical application, the input signal frequency can vary from 1kHz to 20kHz. An external capacitor can be used to separate the integrated circuit from the sensor (C1 and C2) which refers to the capacitance Figure 4. The typical value is 3.3nF. Series input resistors R1 and R2 are used to connect the inverting amplifier inputs (pins 19 and 16) to feedback resistors R3 and R4, and R 3 and R 4 are used to set the gain of the amplifier. A medium voltage level is generated inside the IC. This level is set to midway between DD and ground. This level of the entire integrated circuit is used as a quiet DC reference for signal processing circuits within the IC. This is for several reasons, it can be used as a reference voltage, and it must be bypassed to ensure that it still serves as a quiet reference for the internal circuitry. The input amplifier is designed to have a power-down capability in which its bias circuit is disabled and its output enters a three-state condition when activated. This is used during the diagnostic mode in which the output terminals of the amplifier externally drive various test signals in the world.

 

Input amplifier connection:

 

 

Anti-aliasing filter

 

The integrated circuit has a 3rd order Butterworth filter with a 3dB point of 70kHz. Double capacitors and implantable resistors are used to set the pole filter. This filter needs to have more than 1 dB of attenuation (the highest frequency off interest) and 10 dB of minimum attenuation of 180 kHz at 20 kHz. This filter is before the system at the 200kHz system frequency of the switched capacitor filter stage.

 

Programmable gain stage

 

The gain can be adjusted by two identical programmable gain stages so that the energy of the knock can be compensated if needed. This adjustment can be made by performing 64 different gain settings, ranging between 2 and 0.111. These signals can be oscillated between 20 and discussed in the SPI communication with 80% of VDD.

 

Programmable bandpass filter

 

Two identical programmable filters are used to detect the frequency of interest. A bandpass filter (BPF) is programmed to pass the frequency component of the engine. The filter frequency is built from the characteristics of the particular engine and transducer. By integrating the integration phase from the two rectified filtered outputs, knock can detect if it has occurred. These filters have a nominal differential gain of 4. The frequency is determined by a programmable word (in the setup SPI communication protocol section). The center frequency can be programmed from 1.22kHz to 19.98kHz in 64 steps. The filter Q report is usually 2.4.

 

The output of the bandpass filter of the active full-wave rectifier is buffered by the full-wave rectification before the unity gain. Each side of the rectifier circuit provides a negative and knock frequency bandpass frequency as a positive value filter output. The output can swing from 20 to 80% of the DD of V. Be careful to minimize the input from the RMS change input to this stage.

 

The programmable integration stage separates the signal from the rectifier stage into two outputs and then integrates them into a signal path. The differential system is used to reduce noise. One side integrates positive energy values ​​from the cottage high frequency rectification. The second side is integrated as a negative energy value. A phase signal that is opposite to the negative energy signal. Using this technique reduces the actual signal from the effects of system noise.

 

The integral time constant is software programmed by the integration time constant communication protocol section discussed. The time constant can be programmed from 40 μs to 600 μs with a total of 32 steps. If, for example, we set a time constant of 200μs and then use a difference of one volt between channels, the output integral will change at 200ps. The integral is the rising edge enable signal INT / HOLD controlled by the input. When the internal integrated 20μs input reaches a logic high level, the output of the integrator will drop by approximately VRESET, 0.125V. The output integrator is an analog voltage.

 

Differential to Single-Ended Converter This circuit uses the differential output of the integrator (by testing the multiplexer circuit) and provides a signal which is the sum of these two signals. This technique is used to improve the system's immunity to interference.

 

Output Buffer The amplified output is the same as the input amplifier of the amplifier circuit used to interface with the sensor. In order for the output of the anti-aliasing filter to be evaluated for diagnostic purposes, this amplification is in the power down mode.

 

Test Multiplexer This circuit receives the IC from the positive and negative output integrators to output ICs from different parts. The output of the test multiplexer is connected by the network to the programming word of the fth control communication protocol. The output of this multiplexed switched capacitor filter has its gain control output and the output of the anti-aliasing filter.

 

The SPI communication protocol uses a knock sensor (MOSI) that communicates over the SPI bus. A chip select pin (CS) is used to enable the chip, which, in conjunction with the SPI clock (SCK), moves along with an 8-bit programming word. Five different programming words are used to set the following internal programmable registers: gain, bandpass frequency filter, integrator time constant, channel selection, SO output mode, and test block. When Chip Select (CS) goes low, the next falling edge of the SPI clock (SCK), the data is latched into the SPI of the register. These data were transferred to the most significant point of the sci-fi first and most significant last point. Each word is divided into two parts: the network connects to the first address, and then the value. Controlled according to different functions, the address is 2 or 3 bits, and the value is 5 or 6 bits long. All network connections have been programmed into the IC in the hold mode of operation. The integrated or hold mode of this operation is controlled by the INT/HOLD input signal.